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Patent Searching and Data


Title:
DATA TRANSFER CONTROLLER
Document Type and Number:
Japanese Patent JPH06314254
Kind Code:
A
Abstract:

PURPOSE: To prevent transfer time from lengthening uselessly, and simultaneously, to attain the effective utilization of a buffering memory in the case that data is transferred between two devices different in transfer rate through the buffering memory.

CONSTITUTION: The sending speed V1 of a transmitting side and the processing speed V2 of a receiving side are detected (S10), and the necessary maximum storage quantity B1 or B2 of the buffering memory is calculated by B1= Pi.(1-V1/V2) at the time of V1<V2, and by B2=Pi.(1-V2/V1) at the time of V1≥V2 (Pi: size of transferred data) (S20, S30, S80). By switching a memory bank on the basis of this result, the area of the maximum storage quantity B1 or B2 is secured as a buffering area in a FIFO memory, and the area other than this is used for other use (S40, S90). Next, the storage quantity of the transferred data in the FIFO memory is investigated (S50, S100), and at the point of time when the storage quantity becomes B1 at the time of V1≥V2 or becomes the portion of one line at the time of V1≥V2, the fetch of the data from the FIFO memory by the receiving side is started (S70).


Inventors:
HAYASHI SUKEYASU
NARASAKI MINORU
Application Number:
JP12519493A
Publication Date:
November 08, 1994
Filing Date:
April 27, 1993
Export Citation:
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Assignee:
DAINIPPON SCREEN MFG
International Classes:
G06F5/14; G06F5/06; G06F13/38; (IPC1-7): G06F13/38; G06F5/06
Attorney, Agent or Firm:
Ryohei Kobayashi