Title:
DELTA-SIGMA TYPE D/A CONVERTER
Document Type and Number:
Japanese Patent JP3416477
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the generation of a distortion of an analog signal by making it possible to earn an output amplitude of the analog signal up to a power source voltage.
SOLUTION: A quantization circuit 11 of a bit compression circuit 3 which consists a delta-sigma type D/A converter converts, for example, digital data of 18 bits into digital data DG 2 of 3 bits. An adding circuit 12 calculates data for expressing a quantization noise on the basis of a signal on an input side and a signal on an output side of the quantization circuit 11. After the data for expressing the quantization noise have been supplied to a latch circuit 13, delayed just for 1 sampling period, they are inputted to an adding circuit 14 and added to digital data DG 1. A clip circuit 15 clips the digital data outputted from the adding circuit 14 within a conversion range of the digital data of the quantization circuit 11.
Inventors:
Tsutomu Murata
Application Number:
JP22642897A
Publication Date:
June 16, 2003
Filing Date:
August 22, 1997
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
H03M1/08; H03M3/02; (IPC1-7): H03M3/02; H03M1/08
Domestic Patent References:
| JP5244009A | ||||
| JP376318A |
Attorney, Agent or Firm:
Hironobu Onda