Title:
DIGITAL DEFUZZIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP3142071
Kind Code:
B2
Abstract:
PURPOSE: To obtain a digital quantity as a determined value by hardware which performs fuzzy inference.
CONSTITUTION: This circuit is equipped with a weighting adding circuit 2 which multiplies electric signals, showing fuzzy information distributed on plural lines, by values corresponding to the order of the lines and adds the products, a simple adding circuit 3 which adds electric signals without weighting, a constant current source 5 which is connected to the common point of the simple adding circuit, a D/A converter 4 which is connected to the common point of the weighting adding circuit, and a control circuit 7 which outputs a digital quantity to the D/A converter so as to hold the voltage at a downstream point B of the weighting adding circuit and the voltage at a downstream point C of the simple adding circuit at the same level; and the digital value outputted to the D/A converter is used as the determined value.
Inventors:
Tetsuro Ren
Application Number:
JP32366391A
Publication Date:
March 07, 2001
Filing Date:
November 12, 1991
Export Citation:
Assignee:
Mikuni Corporation
International Classes:
G06G7/12; G06F9/44; G06N7/02; (IPC1-7): G06G7/12; G06F9/44
Domestic Patent References:
| JP296293A | ||||
| JP1224802A | ||||
| JP63123177A | ||||
| JP4316174A | ||||
| JP4363777A | ||||
| JP296296A | ||||
| JP254301A |
Attorney, Agent or Firm:
Norio Ishii