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Patent Searching and Data


Title:
DIGITAL RECEIVING CIRCUIT
Document Type and Number:
Japanese Patent JP2005072872
Kind Code:
A
Abstract:

To suppress increase in circuit scales and power consumption and to attain reception capable of discriminating an existing system and a new system in the case of using both the existing system and new system together.

By sharing an MF coefficient part by respective timing detection parts of Ach and Bch and realizing phase rotation by phase rotation quantity or code inversion to detect differences between respective channels, the timing of both the channels is detected and identified. Even in the case of using the new system together with the existing system, the timing part of the new system and the timing part of the existing system are arranged in parallel and an FFT circuit, a channel estimation circuit, a channel equalization circuit, etc. arranged following the timing detection parts are shared between the existing system and the new system.


Inventors:
KIZAWA TAKESHI
OTA ATSUSHI
AIKAWA SATOSHI
Application Number:
JP2003298846A
Publication Date:
March 17, 2005
Filing Date:
August 22, 2003
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04J11/00; (IPC1-7): H04J11/00
Attorney, Agent or Firm:
Naotaka Ide
Toshinao Shimodaira