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Title:
DOUBLE INTEGRATION TYPE ANALOG-DIGITAL CONVERTER
Document Type and Number:
Japanese Patent JPS5539455
Kind Code:
A
Abstract:

PURPOSE: To use only one-series counter as well as to realize the scaling switching by forming a series part through the serial connection of the decimal counter group, the setting part, the gate part and the decimal counter each.

CONSTITUTION: Clock signal CK1 is prepared along with clock signal CK2 containing the integer-fold pulses within its one cycle. And counter parts 7∼10, 12, 13 and 16, which can count signals CK1 and CK2, are provided. Thus integration value of the input unknown voltage 5 is memorized 31∼34 when signal CK1 is counted up to the prescribed amount, and at the same time the count value of part 7 is reset. Then the memory integral value is integrated toward zero by reference voltage 6, and also signal CK2 is counted at the counter part. And the count value of the counter parts is memorized in memory circuits 31∼34 when the memory integral value reaches zero. The counter part is reset when the full count value is counted in proportion to the pulse number of CK1. As a result, only one series of counters suffices to realize the scaling switch.


Inventors:
NAKAMOTO AKIRA
Application Number:
JP11314178A
Publication Date:
March 19, 1980
Filing Date:
September 13, 1978
Export Citation:
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Assignee:
KUBOTA LTD
International Classes:
H03M1/10; H03M1/52; (IPC1-7): H03K13/02; H03K13/20
Domestic Patent References:
JPS4828310A1973-04-14