PURPOSE: To increase a read speed of a DRAM.

CONSTITUTION: Bit lines BL1 BL2 are connected to gates of transistors Q3 Q4 of an amplifier circuit AMP, and the drains of the transistors Q3, Q4 are connected to read bus lines RB1, RB2. Before a sense amplifier SA1 is operated, the sense amplifier SA1 is separated from the bit lines BL1 BL2 beforehand by the transistors Q7, Q8 in an off state, and the transistors Q5, Q6 of the amplifier circuit AMP are turned on, and signals on the bit lines BL1, BL2 are read out to the read bus lines RB1, RB2.