Title:
レチクル検査中にグローバルデータを収集するための装置および方法
Document Type and Number:
Japanese Patent JP4588222
Kind Code:
B2
Abstract:
Disclosed is a method of inspecting a reticle defining a circuit layer pattern that is used within a corresponding semiconductor process to generate corresponding patterns on a semiconductor wafer. A test image of the reticle is provided, and the test image has a plurality of test characteristic values. A baseline image containing an expected pattern of the test image is also provided. The baseline image has a plurality of baseline characteristic values that correspond to the test characteristic values. The test characteristic values are compared to the baseline characteristic values such that a plurality of difference values are calculated for each pair of test and baseline characteristic values. Statistical information is also collected.
Inventors:
Willie James N.
Ye Jun
Juang Shou-Te
Ares David S.
Lou Yen-Wen
Khao Yu
Ye Jun
Juang Shou-Te
Ares David S.
Lou Yen-Wen
Khao Yu
Application Number:
JP2000615380A
Publication Date:
November 24, 2010
Filing Date:
April 28, 2000
Export Citation:
Assignee:
KLA-Tenker Corporation
International Classes:
G03F1/08; G06T1/00; G06T7/00; H01L21/027
Domestic Patent References:
JP59099338A | ||||
JP59157505A | ||||
JP60057929A | ||||
JP63088682A | ||||
JP2170279A | ||||
JP3278057A | ||||
JP4107946A | ||||
JP7140640A | ||||
JP7147309A | ||||
JP8076359A | ||||
JP8137093A | ||||
JP10074812A | ||||
JP10090192A | ||||
JP11194154A | ||||
JP2002532760A |
Attorney, Agent or Firm:
Meisei International Patent Office
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