Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
ERROR CORRECTING SYSTEM
Document Type and Number:
Japanese Patent JPS5469349
Kind Code:
A
Abstract:

PURPOSE: To enable to enlarge the limit of correction for error data by making the data decided as an uncorrected error wait for a stated time and anticipating the pointer information in the successive data group.

CONSTITUTION: By logical operation results 21 and 22 of syndrome generating circuits S1 and S2 and error position indicating information of pointer circuit 2, error decision circuit 4 decides wether an error occurs in the data group or not and the error can be corrected or not; if there is no error, data stored in buffer 3 is transferred to circuit 4. When existence of errors is confirmed and the error can be corrected by syndromes 21 and 22 and pointer 2 information, the error patturn of the position to be corrected is generated 7 and contents of buffer 3 are corrected by correction circuit 5. When data is decided as uncorrected one, a correction unable signal is sent to wait control circuit 6 through signal line 8, correcting operation is stopped for a stated time and circuit 4 is reset; referring to the pointer, the data are returned to the sequence which can decide errors.


Inventors:
FURUYA TSUKASA
Application Number:
JP13704777A
Publication Date:
June 04, 1979
Filing Date:
November 14, 1977
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F11/10; G06F12/16; G11C29/00; (IPC1-7): G06F11/10; G11C29/00



 
Previous Patent: 機器制御システム

Next Patent: JPS5469350