Title:
FORMATION OF CU WIRING
Document Type and Number:
Japanese Patent JP2948062
Kind Code:
B2
Abstract:
PURPOSE: To form a barrier layer for Cu wiring at a low temperature which does not lead to the deterioration of a semiconductor device.
CONSTITUTION: A TiN barrier layer 12, a Cu layer 14. and a TiN barrier layer 16 are laminated on a base, 10 in the order. Next on the barrier layer 16, an SiO2 etching mask 18a is formed. Next the barrier layer 16, the Cu layer 14, and the barrier layer 12 are etched in order with the aid of the mask 18a by RIE method and processing into a wiring shape is performed. In this case a mixed gas of SiCl4, Cl2, and N2 is used as an etching gas. It is possible to deposit SiOXNY barrier layers 22 on the etched sidewalls of the barrier layer 16, the Cu layer 14, and the barrier layer 12 etching these layers, by controlling the ratio of the numbers of Si and Cl atoms in the etching gas. Besides, it is possible to perform the etching and the deposition of the barrier layers 22 at a low temperature so as to prevent the deterioration of the semiconductor device.
Inventors:
IGARASHI YASUSHI
Application Number:
JP20420693A
Publication Date:
September 13, 1999
Filing Date:
August 18, 1993
Export Citation:
Assignee:
OKI DENKI KOGYO KK
International Classes:
H01L21/302; H01L21/3065; H01L21/3205; H01L23/52; (IPC1-7): H01L21/3205; H01L21/3065
Domestic Patent References:
| JP6244181A | ||||
| JP4350939A | ||||
| JP4322425A | ||||
| JP4106930A | ||||
| JP499290A | ||||
| JP372625A | ||||
| JP4243134A | ||||
| JP5160081A |
Attorney, Agent or Firm:
Takashi Ogaki
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