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Title:
FREQUENCY DOUBLING CIRCUIT
Document Type and Number:
Japanese Patent JP2002353785
Kind Code:
A
Abstract:

To provide a frequency doubling circuit that generates a double signal with a constant duty over a broadband.

A multiplier circuit 4 having NPN transistors (TRs) Q7, Q8, Q9 and Q10 multiples an original signal Vin with quadrature signals Ia, Ib orthogonal to the original signal Vin to produce a double signal Vout. A variable phase shift circuit 5 generates the quadrature signals Ia, Ib from the original signal Vin. A differential amplifier AMP and a low pass filter 6 detect a DC voltage signal V5 denoting a deviation from a prescribed duty of the double signal Vout and feedback control is applied to NPN TRs Q1, Q2 on the basis of the DC voltage signal V5 via NPN TRs Q4, Q5 and Q6 or the like forming a current mirror circuit to adjust a phase of the quadrature signal Ia, Ib. The phase of the quadrature signals Ia, Ib is adjusted. Further, the frequency doubling circuit is provided with a fixed phase shift circuit 3 that has a phase characteristic with a prescribed phase difference decided in advance to a phase characteristic of the variable phase shift circuit 5, the fixed phase shift circuit shifts the phase of the original signal Vin and gives the result to the multiplier circuit 4, and the multiplier circuit 4 multiplies the output signal V1 from the fixed phase shift circuit 3 with the quadrature signals Ia, Ib from the variable phase shift circuit 5 to generate the doubling signal Vout.


Inventors:
AKIYAMA KIICHIRO
Application Number:
JP2001162790A
Publication Date:
December 06, 2002
Filing Date:
May 30, 2001
Export Citation:
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Assignee:
PIONEER ELECTRONIC CORP
International Classes:
H03K5/00; (IPC1-7): H03K5/00
Attorney, Agent or Firm:
Nobuhiro Kobashi (1 outside)