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Title:
FREQUENCY SETTING CIRCUIT
Document Type and Number:
Japanese Patent JP2005223439
Kind Code:
A
Abstract:

To provide a frequency setting circuit for a gm-C filter circuit comprising an OTA and a capacitor formed on a semiconductor substrate, wherein the effect of parasitic capacitance such as a wire capacitance is reduced.

The frequency setting circuit disclosed herein includes: a phase shifter 1 comprising a plurality of OTAs and capacitors and for changing the phase of an input reference frequency signal by changing the transconductance of at least one OTA; a phase comparator 2 for outputting a signal of a result of phase comparison between the reference frequency signal and an output signal of the phase shifter 1; and a low pass filter 3 for eliminating an AC component from the signal of the phase comparison result and providing an output of the result as a control signal. A phase locked loop reaching a lock state when a phase difference between both inputs to the phase comparator 2 is a prescribed phase, is formed, and the transconductance of at least one OTA configuring the gm-C filter 4 to be controlled is changed according to the signal proportional to the control signal, to set the frequency characteristic of the gm-C filter 4.


Inventors:
KIMURA KATSUHARU
Application Number:
JP2004027051A
Publication Date:
August 18, 2005
Filing Date:
February 03, 2004
Export Citation:
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Assignee:
NEC ELECTRONICS CORP
International Classes:
H03B1/00; H03H11/04; H03H11/12; H03L7/081; (IPC1-7): H03H11/04
Attorney, Agent or Firm:
Seisei Nishimura