To detect an abnormality of a power conversion device without giving stress to a normal semiconductor element.

A protective circuit 9 includes a voltage detection circuit 3 that detects a collector voltage of a main semiconductor element 10, an XOR circuit 4, and a filter circuit 5. A PWM signal 101, which commands the on/off of the main semiconductor element 10, is outputted from a PWM generation circuit 1. Then, a voltage detection signal 103 corresponding to the collector voltage of the main semiconductor element 10 is outputted from a voltage detection circuit 3. When the semiconductor element 10 is in a short-circuit state, the voltage detection signal 103 of an H level is outputted from the voltage detection circuit 3. When the PWM signal 101 is an off command (an L level), an output of the XOR circuit 104 becomes the H level and an error signal 105 is supplied to the PWM generation circuit 1 through the filter circuit 5.

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