PURPOSE: To attain data processing of lots of data and diversified application of the device with simple configuration by latching reception data of plural multiplexed channels to register with separation and outputting the data based on a transmission timing and destination data.

CONSTITUTION: When a multiplexed reception data frame of plural channels is inputted to a receiver side, a reception frame decomposing circuit section 1 separates the frame for each channel and the frame is outputted to a reception register 2. A reception data setting circuit 3 stores data of a transfer timing of the data latched by the register 2 and destination data. Then a reception selection circuit 4 connects the register 2 to terminals A, B corresponding to a destination bus line based on the destination data. Furthermore, a reception transfer control circuit section 5 outputs data latched in the register 2 based on the transmission timing data. Thus, multiplexing/demultiplexing in a system internal bus is attained with simple configuration and requirements of processing of lots of data and of diversified applications are coped with.