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Title:
INDIUM PHOSPHOROUS HIGH ELECTRON MOBILITY TRANSISTOR
Document Type and Number:
Japanese Patent JPH09246528
Kind Code:
A
Abstract:

To provide an InP HEMT(high electron mobility transistor) abundant in practicality, where gate breakdown strength is improved.

In an InP HEMT where the carrier supply layer 5 is made of n-type InAlAs and the channel layer 3 is made of InGaAs, a carrier inflow trap layer 5c constituted of material narrower in forbidden band width than the carrier supply layer constituent material is provided in the carrier supply layer 5. This carrier inflow trap layer 5c is constituted of InAlGaAs or InAlAs. To be concrete, in case that, for example, the carrier supply layer 5 is constituted of n-In0.52Al0.48As, and the carrier inflow trap layer 5c is constituted of n-In0.52(Al0.3Ga0.7) 0.48 As or n-In0.72Al0.28As, whereby the forbidden band width in the carrier inflow trap layer 5c is set narrower than the upper and lower layers 5a and 5b of the carrier supply layer 5. As a result of this composite structure, the inflow of the positive holes to the gate electrode from among the semiconductor, which is regarded as one cause of the deterioration of the gate breakdown strength, is checked, and the gate breakdown strength is improved.


Inventors:
TSUCHIYA TADAITSU
WAJIMA MINEO
Application Number:
JP5206996A
Publication Date:
September 19, 1997
Filing Date:
March 08, 1996
Export Citation:
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Assignee:
HITACHI CABLE
International Classes:
H01L29/812; H01L21/338; H01L29/778; (IPC1-7): H01L29/778; H01L21/338; H01L29/812
Attorney, Agent or Firm:
Tadao Hirata