Title:
INPUT CIRCUIT AND MEASURING DEVICE
Document Type and Number:
Japanese Patent JP2022083398
Kind Code:
A
Abstract:
To suppress the deterioration of the flatness of the frequency characteristics with a simple method.SOLUTION: An input circuit 100 to which a potential signal Vin is input includes an operational amplifier 10 constituting an inverting amplifier circuit, an input resistor 11 connected to an inverting input terminal (-) of the operational amplifier 10, and a feedback resistor 12 placed in a path where a signal returns from the output terminal of the operational amplifier 10 to the inverting input terminal (-). The feedback resistor 12 is composed of a plurality of resistance elements 121 and 122 connected in series, and the input circuit 100 is connected between the connection point between the resistance elements 121 and 122 and the reference potential (GND) which is the reference of the potential signal Vin, and includes a compensating capacitance 13 that compensates for the capacitance Cp parasitic on the input resistor 11.SELECTED DRAWING: Figure 1
Inventors:
YAMADA SHUHEI
HAYASHI KAZUNOBU
SEKI KENICHI
YODA HAJIME
HAYASHI KAZUNOBU
SEKI KENICHI
YODA HAJIME
Application Number:
JP2021162527A
Publication Date:
June 03, 2022
Filing Date:
October 01, 2021
Export Citation:
Assignee:
HIOKI ELECTRIC WORKS
International Classes:
H03F1/48; G01R13/20; H03F1/34
Attorney, Agent or Firm:
Goto Patent Office
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