Title:
線形性を向上させた光に起因する電荷の積分回路
Document Type and Number:
Japanese Patent JP4024869
Kind Code:
B2
Abstract:
An integrator circuit for photogenerated charges which limits linearity defects. The circuit includes an integration capacitor with a first blade connected to a reference potential and a second blade having a variable potential which receives photogenerated charges. The circuit also includes a resetting MOS transistor of a first type connected to the variable potential at one terminal and to a supply potential on another. The MOS transistor represents a straight capacitance in parallel with the integration capacitor. One or more MOS transistors of a second type are connected to the variable potential and each have a stray capacitance in parallel with the integration capacitor. A variation in the voltage across the terminals of the integration capacitor causes a variation in the value of the straight capacitances of the MOS transistors of the second type which tends to compensate for the variation in the stray capacitance of the MOS transistor of the first type.
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Inventors:
Duquelan, Thierry
Application Number:
JP53388998A
Publication Date:
December 19, 2007
Filing Date:
February 06, 1998
Export Citation:
Assignee:
Thomson tube electronic
International Classes:
H01L27/146; H04N5/335; G06G7/184; G11C27/02
Domestic Patent References:
| JP61142874A | ||||
| JP2000505927A | ||||
| JP6245031A | ||||
| JP7507193A | ||||
| JP8264758A |
Attorney, Agent or Firm:
Sonoda Yoshitaka
Kobayashi Yoshinori
Kobayashi Yoshinori