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Title:
INTEGRATED CIRCUIT INTERCONNECT SYSTEM
Document Type and Number:
Japanese Patent JP2007189241
Kind Code:
A
Abstract:

To provide a means for improving various characteristics of frequency response of an interconnect system.

In an interconnect system for providing access to a common I/O terminal for multiple circuit devices, each device is provided with a separate contact pad within an IC. The contact pads are connected to one another and to the IC I/O terminal through inductive conductors such as bonding wires, metal coating pattern in the IC, or legs of a two-forked spring contact part formed on the IC by lithographic printing. Further the ESD protection function is distributed among multiple ESD devices interconnected by series inductors to provide a multi-pole filter at each IC terminal. The inductances of the conductors and various capacitances of the interconnect system are appropriately adjusted to optimize a frequency response characteristics of the desired interconnect system.


Inventors:
CHARLES MILLER A
Application Number:
JP2007043028A
Publication Date:
July 26, 2007
Filing Date:
February 22, 2007
Export Citation:
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Assignee:
FORMFACTOR INC
International Classes:
H01L21/822; H01L27/04; H01L21/60; H01L23/12; H01L23/522; H01L23/60; H01L23/62; H01L27/02; H01P1/00; H03H7/38
Domestic Patent References:
JPH02198158A1990-08-06
JPH04107940A1992-04-09
JPH0555287A1993-03-05
JPH09121127A1997-05-06
Foreign References:
WO1998047190A11998-10-22
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Natsuki Morishita



 
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