Title:
INTERLINE FLICKER REDUCING DEVICE, DOWN CONVERTER DEVICE AND VIDEO SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP3819515
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce interline flicker while preventing the reduction of resolution by limiting the band of only a vertical high frequency component included in a television(TV) video signal without executing band limiting of an oblique direction high frequency component included in the TV video signal.
SOLUTION: The interline flicker reducing device 1 is provided with an A/D conversion circuit 2, a vertical direction high frequency component extracting circuit 3, a horizontal direction high frequency component extracting circuit 4 and an adder 5. A high definition TV video signal is entered and band limiting only for a vertical high frequency component included in the TV video signal is executed without executing band limiting of an oblique direction high frequency component included in the video signal. When the TV video signal is inputted to a down conversion device and converted down, interline flicker is reduced while preventing the resolution of a current TV video signal from being deteriorated.
Inventors:
Murayama
Seiichi Koshi
Kazuhiko Shibuya
Kenji Nakajima
Seiichi Koshi
Kazuhiko Shibuya
Kenji Nakajima
Application Number:
JP4636997A
Publication Date:
September 13, 2006
Filing Date:
February 28, 1997
Export Citation:
Assignee:
Japan Broadcasting Corporation
International Classes:
H04N5/21; H04N7/01; (IPC1-7): H04N7/01; H04N5/21
Domestic Patent References:
| JP3220990A |
Attorney, Agent or Firm:
Hidekazu Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
Masakazu Ito
Shunichi Takahashi
Toshio Takamatsu
Iwa Saki Kokuni
Kawamata Sumio
Masakazu Ito
Shunichi Takahashi
Toshio Takamatsu
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