Title:
INTERRUPTION CONTROL METHOD FOR ELECTRONIC COMPUTER
Document Type and Number:
Japanese Patent JPS5436148
Kind Code:
A
Abstract:
PURPOSE: To enable quick processing for interruption, by shunting the address of the micro instruction to be executed next at the occurrence of interruption to exclusive stack.
Inventors:
YAMAZAKI KIYOSHI
Application Number:
JP10170577A
Publication Date:
March 16, 1979
Filing Date:
August 26, 1977
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F9/22; G06F9/06; G06F9/42; G06F9/46; G06F9/48; (IPC1-7): G06F9/06; G06F9/18