Title:
LAMINATED CHIP PACKAGE
Document Type and Number:
Japanese Patent JP3250992
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a laminated chip package of simple structure by using a lead frame, without having to use an interposer.
SOLUTION: Although a first and a second chips are mounted on a lead frame, the first chip is fixed on the second chip via silver paste (or non- conductive paste), and a laminated structure body is constituted. An insulating adhesive tape is arranged between the lead frame and the first chip, and the laminated structure body is fixed on the lead frame. In order to support the laminated structure body and realize miniaturization, a recessed part is formed in the lead frame. An inner lead extends over the first chip and constitutes a lead-on-chip(LOC) structure.
Inventors:
Chun-Shin Z
Application Number:
JP26187499A
Publication Date:
January 28, 2002
Filing Date:
September 16, 1999
Export Citation:
Assignee:
Sampo Semiconductor Co-Operation
International Classes:
H01L25/18; H01L25/065; H01L25/07; (IPC1-7): H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP8330508A | ||||
| JP10200043A |
Attorney, Agent or Firm:
Aoyama Ryo (2 outside people)
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