To provide a laminated chip varistor which is reduced in mounting area and mounting cost and can easily be mounted.
External electrodes 25 to 29 are formed on the main surface 22 of a varistor element body 21. A 1st electrode 36 of a 1st internal electrode 33 overlaps with a 1st electrode of a 3rd internal electrode. A 2nd electrode 37a of the 1st internal electrode 33 is led out of the 1st electrode 36 to be exposed on the main surface 22. The 1st electrode 36 is electrically connected to the external electrode 25 through a 2nd electrode 37a. A 1st electrode 38 of a 2nd internal electrode 35 overlaps with the 1st electrode of the 3rd internal electrode. A 2nd electrode 39a of the 2nd internal electrode 35 is led out of the 1st electrode 38 to be exposed on the main surface 22. The 1st electrode 38 is electrically connected to the external electrode 29 through the 2nd electrode 39a.
JPH07201533 | CHIP PART |
MATSUOKA MASARU
SAITO HIROSHI
Shiro Terasaki
Hiroaki Aoki
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