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Title:
LATERAL TRANSISTOR
Document Type and Number:
Japanese Patent JPS61216469
Kind Code:
A
Abstract:

PURPOSE: To enable high output impedance and small base collector junction capacity by forming impurity regions having lower density than the other portions of a collector or the collector and an emitter region in the opposed sides of both the collector and the emitter regions.

CONSTITUTION: An emitter region 14b and collector regions 13a, 14a and 13c, 14c at both sides of the region 14b are formed on the upper surface of an epitaxial layer 11 for forming a base region, a base electrode leading region 15 is further formed, and an emitter electrode 16b, a collector electrode 16c and a base electrode 16d are respectively formed. 13a, 13c designate low density collector regions having low impurity density, and 14a, 14c designate high density collector regions having high impurity density. Thus, large BVCED, high hFE and high output impedance are provided planely in the shape of the same size as the conventional one. Further, collector-base junction capacity is small.


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Inventors:
HAMADA SADAYUKI
Application Number:
JP5781885A
Publication Date:
September 26, 1986
Filing Date:
March 22, 1985
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L29/73; H01L21/331; H01L29/72; (IPC1-7): H01L29/72
Domestic Patent References:
JPS59181058A1984-10-15
JPS59178770A1984-10-11
JPS57183068A1982-11-11
JPS57104254A1982-06-29
JPS5713758A1982-01-23
JPS55108767A1980-08-21
Attorney, Agent or Firm:
Uchihara Shin