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Patent Searching and Data


Title:
LEAD FRAME MEMBER AND SURFACE MOUNT SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH1041432
Kind Code:
A
Abstract:

To provide a ball grid array surface mount semiconductor device using a lead frame adaptable for a multi-terminal structure per layer and high density wiring.

The lead frame 110 has outer terminals 113 arranged at specified pitches along the side of a die pad 111 so as to be flush with the height of lead frame members 100 and inner leads 112 which are thinner than the lead frame member 100. One face of the inner lead 112 is a lead frame material face 111S. The die pad 111 and outer frame 114 are flush with the top of the lead frame member 100. A fixing tape 120 is disposed in a region not covering the outer terminal region. At a region near the corners of the die pad 111, the tape 120 disposed at this region expands to extrude more to the outside from the extension region of the tape 120 and outer terminal 113 region is formed to match this.


Inventors:
SAGARA HIDEJI
Application Number:
JP21215396A
Publication Date:
February 13, 1998
Filing Date:
July 24, 1996
Export Citation:
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Assignee:
DAINIPPON PRINTING CO LTD
International Classes:
H01L23/12; H01L23/50; (IPC1-7): H01L23/12; H01L23/50
Attorney, Agent or Firm:
Atsumi Konishi