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Title:
LEVEL SHIFT CIRCUIT AND SOLID-STATE IMAGING DEVICE EMPLOYING THE SAME
Document Type and Number:
Japanese Patent JP2008211807
Kind Code:
A
Abstract:

To solve the following problem: when a voltage source with a high current supply capability is used other than a CMOS driver in the case of generating a pulse required for a voltage other than a power supply voltage VDD and a GND level, circuit scale as the voltage source is expanded or power consumption is increased for consumption by the voltage source.

A CMOS inverter circuit 43 composed of a P-ch. MOS transistor 41 and an N-ch. MOS transistor 42 is used as a fundamental circuit; and between a GND side circuit terminal of the CMOS inverter circuit 43 and a GND, an N-ch. MOS transistor 44 with a drain and a gate connected (diode-connected) in common, is connected. Among the CMOS inverter circuit 43, the N-ch. MOS transistor 44 and a power source VDD, an N-ch. MOS transistor 45 which operates as a current source, is connected.


Inventors:
YONEMOTO KAZUYA
Application Number:
JP2008057143A
Publication Date:
September 11, 2008
Filing Date:
March 07, 2008
Export Citation:
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Assignee:
SONY CORP
International Classes:
H03K19/0185; H03K19/0175; H04N5/335; H04N5/369; H04N5/374
Domestic Patent References:
JPH06343033A1994-12-13
JPH09270696A1997-10-14
JPH09245482A1997-09-19
JPH05198755A1993-08-06
Attorney, Agent or Firm:
Funabashi Kuninori