To provide a voltage amplifier capable of amplifying input signals having a variety of signal amplitudes to have a certain amplitude by using a reference voltage circuit having an excellent response performance.
In a reference voltage generation circuit 7, only a switch SW1 is turned off in a first period and a maximum peak value Vmax of an input signal In is kept at a node A of a first capacitor 1. In the next second period, switches SW2 and SW3 are released and a voltage difference of the maximum peak value V max and a minimum peak value Vmin is held at a node C of a capacitor array 4. At this time, a holding voltage of a second capacitor 2 in the capacitor array 4 is added to a holding voltage of a first capacitor 1, and a voltage of a node B is outputted as a reference voltage Vref. The input signal In is given to one input terminal of a differential amplification circuit 6, and the reference voltage Vref is given to the other input terminal. The reference voltage Vref is generated at a point of time when the holding voltages of the nodes A and C are stabilized.
| JPH03237594A | 1991-10-23 | |||
| JPH0798335A | 1995-04-11 | |||
| JPH02101637A | 1990-04-13 | |||
| JPH06310967A | 1994-11-04 | |||
| JPS62150933A | 1987-07-04 | |||
| JPS647813A | 1989-01-11 | |||
| JPH09289495A | 1997-11-04 |
| US5923219A | 1999-07-13 |
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura