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Title:
LOADED LINE TYPE SEMICONDUCTOR PHASE SHIFTER
Document Type and Number:
Japanese Patent JPS63246901
Kind Code:
A
Abstract:

PURPOSE: To make the titled phase shifter miniaturized and lightweight by connecting two gate electrodes of FETs of a loaded line type semiconductor phase shifter by a gate connection line so as to use only one bias circuit.

CONSTITUTION: A drive bias voltage is impressed to a gate electrode 6 of other FET 8 via a gate connection line 17. In this case, a common source electrode 7 is connected to ground and since the drain electrode 5 is connected to ground in terms of DC by connecting a ground pad 15 to ground, two FETs 8 are operated normally. In turning on/off the drive bias voltage, the impedance of the two FETs 8 is changed at the same time and the susceptance of a loading line 4 viewed from a main line 3 is changed. The change in the transmission phase of the main line 3 in this case is used to form a phase shifter. Since the gate connection line 17 is in use in this way, one distributed constant bias circuit 12 is enough and miniaturization and light weight of the phase shifter are attained.


Inventors:
AOKI HIROSHI
NAKAHARA KAZUHIKO
MATSUNAGA MAKOTO
Application Number:
JP8171487A
Publication Date:
October 13, 1988
Filing Date:
April 02, 1987
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01P1/185; (IPC1-7): H01P1/185
Domestic Patent References:
JPS5951602A1984-03-26
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)