Title:
LOGIC GATE CIRCUIT LIMITING TRANSIENT BOUNCE OF POTENTIAL OF INTERNAL VOLTAGE SUPPLY CIRCUIT
Document Type and Number:
Japanese Patent JPH04233324
Kind Code:
A
Abstract:
PURPOSE: To limit the temporary change of the potential of an internal voltage supply line to an external voltage power source to which this line is connected by limiting a maximum current flowing in the output stage of a gate. CONSTITUTION: The base-emitter route of an output transistor TR Q5 is shunted to the collector-emitter route of a current bypass TR Q6 which has the base driven by a control TR. The output TR is an equivalent combined TR formed by a combination of TRs Q2 and Q4 of Darlington connection, and the TR Q6 itself is a combined TR like this. The incremental part of the base driving current sent to the output TR by the control TR is commutated by the current bypass TR according as the collector current of the output TR is increased, thereby limiting a maximum collector current of the output TR.
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Inventors:
DAARERU KIYUU JIYONSON
Application Number:
JP13298591A
Publication Date:
August 21, 1992
Filing Date:
June 04, 1991
Export Citation:
Assignee:
PHILIPS NV
International Classes:
H03K17/16; H03K17/615; H03K19/003; H03K19/086; H03K19/088; (IPC1-7): H03K17/16; H03K17/615; H03K19/086; H03K19/088
Attorney, Agent or Firm:
Minoru Nakamura (7 outside)