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Patent Searching and Data


Title:
LOOP OPTIMIZING METHOD
Document Type and Number:
Japanese Patent JPH06290057
Kind Code:
A
Abstract:

PURPOSE: To optimize a loop by a compiler for architecture having a function for invalidating the execution result of a previously executed instruction in accordance with judgement whether branching is to be executed by a succeeding condition branch or not.

CONSTITUTION: A loop conversion selecting part 107 in a loop optimizing part 104 determines a loop converting method, and when an instruction for using an invalidating function is usable, a loop conversion executing part 108 converts a loop using the instruction to optimize the loop. Consequently the number of instructions or the number of registers to be used can be reduced without losing a convensional loop conversion effect, and even when the repeated frequency of the loop is not determined at the time of starting the loop, loop conversion can be executed.


Inventors:
SATO SHIGEHISA
TOYAMA KEISUKE
Application Number:
JP7787993A
Publication Date:
October 18, 1994
Filing Date:
April 05, 1993
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F9/45; G06F9/38; (IPC1-7): G06F9/45
Attorney, Agent or Firm:
Ogawa Katsuo