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Patent Searching and Data


Title:
LOW POWER CONSUMPTION CRYSTAL OSCILLATION CIRCUIT
Document Type and Number:
Japanese Patent JPS5539477
Kind Code:
A
Abstract:

PURPOSE: To realize reduction of the power consumption as well as a high time accuracy for the oscillation circuit by installing the voltage adjustment circuit between the inverter and the DC power source.

CONSTITUTION: For C-MOS inverter 10, P-channel MOSFET1 and N-channel MOSFET2 are connected complementarily to apply the negative feedback to the input side from the output side, and the crystal oscillator is inserted into the negative feedback loop. And voltage adjustment circuit 3 is installed between inverter 10 and DC power source VD in order to apply the different bias to FET1 and 2, and at the same time the auto-bias circuit consisting of diodes D1 and D2 is installed to each gate of FET1 and 2. In such way, the power consumption can be reduced for the oscillation circuit along with enhancement of the time accuracy.


Inventors:
SAITOU TAKAHITO
MATSUBAYASHI MASARU
Application Number:
JP11342678A
Publication Date:
March 19, 1980
Filing Date:
September 13, 1978
Export Citation:
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Assignee:
MEIDENSHA ELECTRIC MFG CO LTD
International Classes:
H03B5/36; (IPC1-7): H03B5/36