PURPOSE: To reduce the quantity of intrusion of ions and minimize parasitic capacitance, and to operate an integrated circuit at high speed by implanting the ions of an N type impurity to a semi-insulating GaAs crystal substrate while the impurity is inclined and implanting the ions of the N type impurity for the second time at acceleration voltage in the same extent as the first time in the direction vertical to [100] while using a Schottky gate electrode as a mask.

CONSTITUTION: Si ions are implanted to the [100] plane of a semi-insulating GaAs substrate 1 to prepare an N type conductive layer 9 on the surface. The ions are implanted from the direction inclined at approximately 7° at that time. Consequently, the reproducibility of the pinchoff voltage of a field-effect transistor is improved. A Schottky gate electrode 10 is formed, and the ions are implanted for the second time while using the electrode 10 as a mask. Acceleration voltage at that time is reduced sufficiently in the same extent as the first tiem, and the ions are implanted in the direction vertical to the [100] face. Accordingly, the ions are implanted deeply for a channeling effect, and the peak carrier concentration of regions 92 is not made more excessive than the operating layer 9 section to an implantation in the quantity of a dose required. The quantity Al of an intrusion to the lower section of the electrode 10 can be reduced sufficiently because of small acceleration voltage at that time.