To form a MOS transistor with a uniform threshold voltage by providing a process for forming a groove and then implanting an ion that prevents a predetermined impurity from being diffused into the side wall part, performing annealing, and forming an impurity diffusion prevention layer.

After a silicon oxide film 6 is formed on the surface of a groove, a nitriding ion is implanted and an ion injection layer is formed. A silicon oxide film 7 is formed by the CVD method to bury the groove. Then, thermal oxidation is performed, a gate oxide film 8 is formed, a boron ion is implanted for forming a channel dope layer 9A, a gate electrode 10 such as a polysilicon film is formed, and source/drain regions 11-1 and 11-2 are formed by the ion implantation of phosphor or arsenic and annealing, thus preventing an impurity such as boron from being diffused into the silicon oxide films 6 and 7 in element separation structure from a channel-doped layer directly below a gate electrode by heat treatment.