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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS60240157
Kind Code:
A
Abstract:

PURPOSE: To manufacture the MOS type field effect transistor suitable for high speed and high degree of integration, by providing two polycrystalline silicon layers.

CONSTITUTION: An oxide film region 8 is formed on a p type substrate 1, A gate oxide film 11, a polycrystalline Si layer 9 and an oxide film layer 10 are sequentially formed. Then, the polycrystalline Si layer 9 and the oxide film layer 10 are transformed into the specified shape having a gate pattern. For example, a low-concentration n type region 12 is formed by the implantation of arsenic ions. Then an oxide film layer 13 is formed. Thereafter, a polycrystalline Si layer 14 and a photo-resist layer 15 are sequentially formed. The polycrystalline Si layer 14 and the photo-resist layer 15 are removed until the oxide film layer 10 on the gate polycrystalline Si layer 9 is exposed. The specified part of the polycrystalline Si layer 14 is selectively oxidized, and an oxide film layer 16 is formed. For example, phosphorus is introduced, and a high-concentration n type region 18 is formed. Then an insulating film 17 is formed. A hole is provided at the specified part, and a wiring 19 of Al and the like is formed.


Inventors:
OOKI MASARU
Application Number:
JP9600584A
Publication Date:
November 29, 1985
Filing Date:
May 14, 1984
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L27/088; H01L21/28; H01L21/285; H01L21/8234; H01L29/78; (IPC1-7): H01L27/08; H01L29/42; H01L29/78
Attorney, Agent or Firm:
Uchihara Shin