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Title:
MANUFACTURE OF SOLID-STATE IMAGE SENSING DEVICE
Document Type and Number:
Japanese Patent JPH07106543
Kind Code:
A
Abstract:

PURPOSE: To reduce the dangling bonds of silicon in the interface between silicon and an oxide film, by forming a second gate insulation film through a vapor growth method (a CVD method).

CONSTITUTION: Into the surface of an n-type silicon substrate 1, boron is injected, and by the heating thereof, a p-type well layer 2 is formed. Then, while photoresists are used as masks, p-type and n-type well layers 3, 4 are formed in succession by the injections of p-type and n-type impurity ions, and thereafter, an n-type region is formed by the injection of an n-type impurity ion. Subsequently, by a CVD method, a first gate oxide film 6 and a first polycrystalline silicon film are formed, and thereafter, by the patterning of the first polycrystalline silicon film after a predetermined shape, a first charge transfer electrode 7 is formed. Then, while the electrode 7 is used as a mask, the first gate oxide film 6 is removed, and thereafter, a second gate oxide film 9 is formed thereon by a CVD method. Since the second gate oxide film 9 is formed by the CVD method, stresses are made small in comparison with conventional ones wherein nitride films are used, and in its turn, the dangling bonds of silicon can be reduced.


Inventors:
MINAMI KAZUMA
Application Number:
JP25125593A
Publication Date:
April 21, 1995
Filing Date:
October 07, 1993
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/148; (IPC1-7): H01L27/148
Domestic Patent References:
JPS618578A1986-01-16
JPH04207075A1992-07-29
JPH04324632A1992-11-13
JPS63312677A1988-12-21
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)