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Title:
MANUFACTURING METHOD FOR SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JP2003168783
Kind Code:
A
Abstract:

To provide a manufacturing method for a semiconductor memory capable of forming a ferroelectric capacitor for which the boundary of a ferroelectric film and the upper and lower electrodes is steep in order to realize a highly integrated device.

The manufacturing method for the semiconductor memory which is provided with a ferroelectric substance between a pair of electrodes and stores data by polarization of the ferroelectric substance corresponding to an application voltage to both electrodes comprises a process of forming a first electrode 35 on a substrate, a process of forming a ferroelectric substance layer 23 on an upper layer of the first electrode 35, and a process of forming a second electrode 37 on the upper layer of the ferroelectric substance layer 23. The process of forming the ferroelectric substance layer 23 includes at least a process of irradiating a ferroelectric precursor layer or the ferroelectric substance layer with light of an ultraviolet region. The ferroelectric precursor layer is irradiated and crystallized, or the ferroelectric substance layer is irradiated and an impurity layer or the like of a surface layer is removed.


Inventors:
TANAKA NAOHIRO
Application Number:
JP2001364895A
Publication Date:
June 13, 2003
Filing Date:
November 29, 2001
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/316; H01L21/8246; H01L27/105; (IPC1-7): H01L27/105; H01L21/316
Attorney, Agent or Firm:
Takahisa Sato