To provide a method for manufacturing a semiconductor memory that allows the upper surface at a trench wall to touch the lower surface of an interlayer insulation film with a width at the trench wall and memory node electrodes of adjacent trenches to be electrically isolated sufficiently, and to provide a semiconductor memory manufactured by that method.

A mask layer where a plurality of trenches TR open in an arranged pattern is formed on a substrate 10 and used as a mask for forming a plurality of trenches partitioned by trench walls 10a in the substrate while being arranged. The mask layer is removed and a plate electrode PL (12) is formed on the surface layer of the inner wall of the trench and a capacitor insulation film 13 is formed on the surface of the inner wall of the trench. Subsequently, a conductive film is formed of a conductive material insulated by insulation processing to become thicker than the depth of the trench. Thereafter, the conductive film is subjected to insulation processing from the upper surface until the conductive film reaches the upper surface of the trench wall and an interlayer insulation film 15 is formed, thus separating the conductive film to the memory node electrode MN (14) of each trench.