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Patent Searching and Data


Title:
MEMORY MAPPING SYSTEM
Document Type and Number:
Japanese Patent JPS60107153
Kind Code:
A
Abstract:

PURPOSE: To expand flexibly a memory without requiring any complicated circuit by providing a means assigning an additional bit for memory mapping to a low-order bit of a memory address.

CONSTITUTION: A memory map controller 7 is provided to assign the additional bit for memory mapping to low-order bits MA0WMA2 of the memory address at an even number memory 8 and an odd number memory 9. Fifteen address lines A0WA14 from the system are required when three additional bits for mapping and a 256-Kbyte of memory capacity are used. In actual memory address lines MA0WMA17, 256-Kbyte is divided in this case into 32-Kbyte×8.


Inventors:
FUJII MICHIO
Application Number:
JP21582283A
Publication Date:
June 12, 1985
Filing Date:
November 16, 1983
Export Citation:
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Assignee:
RICOH KK
International Classes:
G06F12/02; G06F12/06; (IPC1-7): G11C8/00
Attorney, Agent or Firm:
Kiyoshi Torii