Title:
METHOD FOR FORMING CIRCUIT OF BUILD-UP MULTILAYER CIRCUIT BOARD
Document Type and Number:
Japanese Patent JP2003168861
Kind Code:
A
Abstract:
To provide a method for forming the circuit of a build-up multilayer circuit board without bringing about a fault or a pinhole at the bottom of a BVH by improving the adhesive properties of an electrodeposition coating resist.
The method for forming the circuit by a method for electrodeposition coating the build-up multilayer circuit board having a BVH structure comprises the steps of uniformly and finely roughing the surface of a copper plating of the board and the bottom of the recess structure of the BVH as a pretreatment of forming a circuit. Wet blasting is particularly used for the roughing. Further, after the roughing, cleaning is conducted by a degassed water and an ultrasonic cleaning method.
Inventors:
SUZUKI AKIRA
IWATOU CHIEMI
TAKASHIMA MITSUHISA
KOJIMA MASARU
IWATOU CHIEMI
TAKASHIMA MITSUHISA
KOJIMA MASARU
Application Number:
JP2001366440A
Publication Date:
June 13, 2003
Filing Date:
November 30, 2001
Export Citation:
Assignee:
NIPPON CMK KK
International Classes:
H05K3/46; (IPC1-7): H05K3/46
Attorney, Agent or Firm:
Miyuki Ariga (6 people outside)