To provide a method of manufacturing semiconductor device which can prevent a problem in the dual damascene process that, when an SiN film is formed on the wiring including copper hillock, it is formed in unequal thickness, giving a physical and chemical damage resulting from break of SiN film during the process to the wiring.

The annealing is conducted, after formation of a first wiring 25 as the underlayer wiring, to intentionally generate a copper hillock 26 and it is then removed by the polishing of the CMP method. Thereafter, an SiN film 27 is formed in order to prevent generation of copper hillock, acquire the SiN film 27 in the uniform thickness, prevent break of the SiN film 27 in the process, and suppress the physical and chemical damage for the first wiring 25 to the minimum degree.