Title:
METHOD FOR MOLDING SEMICONDUCTOR PACKAGE
Document Type and Number:
Japanese Patent JP2003007744
Kind Code:
A
Abstract:
To provide a method for molding a thin semiconductor package having no unfillng or no deformation of a gold wire by reducing viscosity and enhancing fluidity by uniform melting and kneading.
The method for molding the thin semiconductor package the steps of sealing a semiconductor chip mounted on a substrate by using an epoxy resin composition by injection molding under the conditions of a barrel temperature of 78 to 88°C and an injection pressure of 10 to 50 kgf/cm2, and forming a cured layer having the same chip size as sizes of the chip and the package with a thickness of 300 to 600 μm.
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Inventors:
ITO HIDEO
Application Number:
JP2001187801A
Publication Date:
January 10, 2003
Filing Date:
June 21, 2001
Export Citation:
Assignee:
SUMITOMO BAKELITE CO
International Classes:
B29C45/14; H01L21/56; B29K63/00; B29L31/36; (IPC1-7): H01L21/56; B29C45/14