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Patent Searching and Data


Title:
MICROCOMPUTER SYSTEM AND ITS SECURITY CONTROL METHOD
Document Type and Number:
Japanese Patent JPH11120081
Kind Code:
A
Abstract:

To improve the security function by operating a microprocessor after reading in the contents of a specific address in a memory when the system is initialized.

When the system is initialized, a security control circuit 4 is supplied with a reset signal through a line 41 and a DMA controller acquires an address control bus 11 and a data bus 12 and transfers a key word of 64-bit constitution of the lowest-order address of a flash memory 2 from the flash memory 2 to the security control circuit 4. After this data transfer, CPU resetting is reset and normal operation state is entered. Thus, the CPU 1 is operated after the data (1st key word) of the specific address of the program area of the flash memory are read out at the time of the initialization of the system, and the data (2nd key word) for security resetting is obtained through the subsequent operation of the CPU 1 to allow the rewriting of the flash memory.


Inventors:
SHINOHARA MAKOTO
Application Number:
JP27676197A
Publication Date:
April 30, 1999
Filing Date:
October 09, 1997
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F12/14; G06F21/10; G06F21/62; G06F21/79; (IPC1-7): G06F12/14
Attorney, Agent or Firm:
Norio Ogo (1 outside)