PURPOSE: To easily measure performance (cache hit rate) when constructing a cache memory device required for the high-performance microprocessor.

CONSTITUTION: In a microprocessor 1, a memory access counter 4 and a cache hit counter 5 are provided, and the respective counter values are incremented every time the microprocessor 1 performs memory access and an external cache memory is hit. Both of the counters 4 and 5 are referred to from a program. Therefore, although the performance of a cache system is measured on the stage of test/evaluation, it is not necessary to provide any circuit for measurement especially. Further, the performance can be easily evaluated almost at the level of practical use.