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Patent Searching and Data


Title:
MOS STORAGE DEVICE
Document Type and Number:
Japanese Patent JPS63177394
Kind Code:
A
Abstract:

PURPOSE: To shorten a test time without increasing a chip area by comparing output signals between sense amplifier groups and outputting the result as a coincidence detection result signal in a row unit.

CONSTITUTION: Both memory cell arrays 1 and 2 are activated for access action, and same test pattern data corresponding to one to one is written. If respective row decoders 6 of the arrays 1 and 2 corresponding to one to one are selected, data are read to sense amplifier groups 3 and 4. Respective output signals of sense amplifiers are compared in a coincidence detection circuit 11. The coincidence detection result signal of the circuit 11 goes to an H level if all the output signals of the sense amplifiers coincide, and goes to an L level if there is even one output signal which disagrees. By the constitution, tests of same lines can be executed at once, whereby the test time can considerably be shortened without increasing the chip area due to the increase in the number of division.


Inventors:
ARIMOTO KAZUTAMI
Application Number:
JP845687A
Publication Date:
July 21, 1988
Filing Date:
January 17, 1987
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/41; G11C11/34; G11C11/401; G11C29/00; G11C29/34; (IPC1-7): G11C11/34
Domestic Patent References:
JPS61122998A1986-06-10
JPS6031039A1985-02-16
JPS63102095A1988-05-06
Attorney, Agent or Firm:
Kaneo Miyata (3 outside)