Title:
MULTIPLICATION DEVICE
Document Type and Number:
Japanese Patent JP3519881
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To fix the output signal level of a multiplied result by adjusting the gain of an AGC amplifier circuit corresponding to the output signals of a comparator.
SOLUTION: A multiplication circuit 12 multiplies input signals from a terminal 10 and the terminal 11 and generates the multiplied result in the terminals 13 and 14. Also, a level shifting circuit 15 DC-level-shifts the output signal of a higher potential to a non-signal level among the two output signals of mutually opposite phases of the multiplication circuit 12. Then, the comparator 16 compares the levels of the output signal of the level shifting circuit 15 and the other output signal of the multiplication circuit 12. In such a manner, by DC-level-shifting the output signal of the higher potential to the non-signal level among the two output signals of the mutually opposite phases of the multiplication circuit 12, comparing the level with the other output signal of the multiplication circuit 12 and adjusting the gain of the AGC amplifier circuit corresponding to the result, the level of multiplied output signals is fixed without using an HPF requiring a capacitor.
Inventors:
Kusaka, Shuichi
Kitsuka, Kazuo
Kitsuka, Kazuo
Application Number:
JP23083596A
Publication Date:
April 19, 2004
Filing Date:
August 30, 1996
Export Citation:
Assignee:
SANYO ELECTRIC CO LTD
International Classes:
G06G7/16; (IPC1-7): G06G7/16
Attorney, Agent or Firm:
芝野 正雅
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