Title:
MANUFACTURE OF THIN FILM SEMICONDUCTOR
Document Type and Number:
Japanese Patent JP2590607
Kind Code:
B2
Abstract:
PURPOSE: To reduce a threshold voltage of a thin film transistor and to make electron nobility large by forming a polycrystalline silicon thin film wherein a source/a drain/a channel of a thin film transistor are formed later at a specified temperature on a substrate.
CONSTITUTION: A polycrystalline silicon thin film wherein a source/a drain/-a channel of a thin film transistor formed later is formed on a non-alkali glass substrate at a temperature between a glass transition temperature of the glass substrate of 600°C and 630°C which is 30°C higher than it whereat silicon is formed in a polycrystal state. Thereby, non-alkali glass whose price is relatively low can be used as a substrate while polycrystalline silicon of large crystal grain diameter and good electron mobility is formed. Furthermore, warp and deformation of a substrate caused by high formation temperature can be prevented.
Inventors:
MATSUO MUTSUMI
OOSHIMA HIROYUKI
TAKENAKA SATOSHI
OOSHIMA HIROYUKI
TAKENAKA SATOSHI
Application Number:
JP13051395A
Publication Date:
March 12, 1997
Filing Date:
May 29, 1995
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
H01L29/786; G02F1/136; G02F1/1368; H01L21/336; (IPC1-7): H01L29/786; G02F1/136; H01L21/336
Domestic Patent References:
| JPS59215720A |
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)