Title:
NON-VOLATILE MEMORY ARRAY, MICROCOMPUTER, AND REWRITING METHOD OF PROGRAM FOR MICROCOMPUTER
Document Type and Number:
Japanese Patent JP2002230987
Kind Code:
A
Abstract:
To provide a non-volatile memory array in which the chip area is reduced by giving a contrivance to a mask ROM in which a loader program or the like are stored in a memory array.
Fixed data can be stored previously in a non-volatile region by constituting arbitrarily the number of transistors of a floating gate type for one bit by the number of contacts, the memory array can be also used for a mask ROM storing the loader program or the like, then the non-volatile memory array in which the chip area is reduced can be realized.
Inventors:
ARAKI HIROTA
TOMITA YASUHIRO
TACHIKAWA NAOHISA
HARUYAMA SEISHU
TOMITA YASUHIRO
TACHIKAWA NAOHISA
HARUYAMA SEISHU
Application Number:
JP2001019689A
Publication Date:
August 16, 2002
Filing Date:
January 29, 2001
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C16/04; G06F15/78; G11C16/02; H01L21/8247; H01L27/10; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): G11C16/04; G06F15/78; G11C16/02; H01L21/8247; H01L27/115; H01L27/10; H01L29/788; H01L29/792
Domestic Patent References:
| JPS6185856A | 1986-05-01 | |||
| JPS63306600A | 1988-12-14 | |||
| JPH1056091A | 1998-02-24 | |||
| JPH08315585A | 1996-11-29 | |||
| JP2000182386A | 2000-06-30 |
Attorney, Agent or Firm:
Kazuhide Okada
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