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Patent Searching and Data


Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS USE
Document Type and Number:
Japanese Patent JPH09162313
Kind Code:
A
Abstract:

To prevent characteristic deterioration of a gate oxide film due to hot holes produced at the time of erasing.

In a restoring voltage generation circuit 13 connected to a source region 3, pulse voltage 5V is applied in an initial state of erasing and when erasing proceeds, stepwise higher voltages 10V, 12V of the pulse voltage are applied. In the initial state of erasing a difference in voltage between a floating gate electrode 5 and the source region 3 reduces, hot holes are hardly produced. And, when erasing proceeds and the difference in voltage between the floating gate electrode 5 and the source region 3 decreases, the pulse voltage to be applied is raised by that portion. Thereby, electrons can be drawn until a desired threshold voltage is reached.


Inventors:
MURAMOTO ATSUSHI
Application Number:
JP32210795A
Publication Date:
June 20, 1997
Filing Date:
December 12, 1995
Export Citation:
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Assignee:
ROHM CO LTD
International Classes:
G11C17/00; G11C11/56; G11C16/04; G11C16/14; G11C16/30; H01L21/336; H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L29/788; H01L29/792; G11C16/06; H01L27/115
Attorney, Agent or Firm:
Furuya Eiko (2 outside)