To control a threshold value of a multivalue memory cell without being subjected to variations in manufacture and with good efficiency at the time of converging a threshold value of a memory cell on a prescribed value in order to realize the multivalue by a multivalue memory cell.

A floating gate electrode 3 is formed of polycrystalline silicon and impurity introduction is performed at a very low level or no introduction thereof is performed in order to hold electric conductivity in a state of high resistance. Further, at the time of writing a multivalue memory cell, an implantation region of electrons to be implanted into the floating gate electrode 3 is changed so as to control a channel resistance of the memory cell and to realize a different threshold value of the memory cell thus allowing a fine set-up of the threshold value and an easy memory of two bits (a state of four threshold values) in place of a conventional on bit (a state of two threshold values).