To secure the separation between a memory cell array and a peripheral circuit, by providing a semiconductor device with first element isolating parts within a memory cell array, and equipping it with third element isolating parts which have the same structure as the first element isolating parts, between all places where the memory cell array and the peripheral circuit contact with each other.

A peripheral circuit B is made around a memory cell array A, and a first element isolating part 24 for isolating elements within the memory cell array A is made, with its oxide film buried within the first trench 25. Moreover, a second element isolating part 26 for isolating elements within the peripheral circuit B is made. Furthermore, third element isolating parts 27 being made in the same structure as the first element isolating part 24 are made between all places where the memory array A and the peripheral circuit B makes contact with each other, with their oxide films buried in the second trenches 28. As a result, separation between the memory cell array A and the peripheral circuit B can be secured.