Title:
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
Japanese Patent JP3487690
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To eliminate the need to provide an input terminal for a write protect signal WP from outside and maintain compatibility with an existent EPROM, an existent EEPROM, etc.
SOLUTION: The signal WP for making a protection state set in a protection state setting part 2 of an erasure block 1 effective is generated by a WP signal generation part 9. This WP signal generation part 9 automatically makes the signal WP active when a command station 8 decides a lock block command. When a WP reset command decision part decides a WP reset command, the signal WP is made inactive. Even when a WP setting command decision part decides a setting command, the signal can be made active. Those functions operate when specific data is inputted in a 1st write cycle and a specific address and data are inputted in a 2nd write cycle.
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Inventors:
Katsumi Fukumoto
Masamitsu Taki
Masamitsu Taki
Application Number:
JP25404195A
Publication Date:
January 19, 2004
Filing Date:
September 29, 1995
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G06F12/14; G06F21/62; G06F21/79; G11C16/02; G11C16/22; G11C17/00; (IPC1-7): G06F12/14; G11C16/02
Domestic Patent References:
| JP1282656A | ||||
| JP588985A | ||||
| JP5109293A | ||||
| JP5307507A | ||||
| JP689234A | ||||
| JP6208513A | ||||
| JP56134400A | ||||
| JP57135500A | ||||
| JP60122446A | ||||
| JP60142452A |
Attorney, Agent or Firm:
Shusaku Yamamoto