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Patent Searching and Data


Title:
PWMパルス制御方法
Document Type and Number:
Japanese Patent JP3844060
Kind Code:
B2
Abstract:
For an interval in which an Op-vector and a b-vector are successively output among intervals of output voltage vectors of each phase within a PWM cycle, the output times of each vector are divided by a positive integer m to find divided times of each vector, and the Op-vector and the b-vector are each alternately output for the divided time, each vector being output m times. For an interval in which an On-vector and an a-vector are successively output, the output times of each vector are divided by a positive integer n to find divided times of each vector, and the On-vector and a-vector are each alternately output for the divided time, each vector being output n times. The adoption of this method enables dispersion of the frequency component of current ripple that arises from PWM pulses (1)-(3).

Inventors:
Katsutoshi Yamanaka
Eiji Watanabe
Takaaki Terada
Yoshiyuki Tanaka
Yuzo Terazono
Application Number:
JP2001564451A
Publication Date:
November 08, 2006
Filing Date:
February 20, 2001
Export Citation:
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Assignee:
Yaskawa Electric Co., Ltd.
International Classes:
H02M7/48; H02M7/483; H02M7/5387
Domestic Patent References:
JP11308872A
Attorney, Agent or Firm:
Nobuyuki Kaneda
Katsuhiro Ito
Ishibashi Masayuki